طراحی بهینه مدولاتور سیگما دلتای S-MASH کم-توان و دقت بالا با ساختار STF واحد برای کاربردهای مخابراتی

   [1]      M. Goorani and M. Ghayoori Sales, “A Method to Ensure the Results of Queries on the Outstanding Database Based on the Game Theory,” Journal of Electronical & Cyber Defence, vol. 5, no. 2, 2017. (In Persian)##

   [2]      M. Taghizadeh and A. Nabavi, “Design of Single-Stage Sigma Delta Modulator with 6-MHz bandwidths & 15-bit Resolution,” Iranian Journal on Electric & Computer Engineering (IJECE), vol. 7, no. 4, pp. 307-314, 2008. (In Persian)##

   [3]      N. Maghari, S. Kwon, G. C. Ternes, and U. Moon, “Sturdy MASH sigma-delta Modulator,” Electronics Letters, vol. 42, no. 22,  pp. 1269-1270, 2006.##

   [4]      A. Morgado, R. Del Rı´o, and J. M. de la Rosa, “Cascade ΣΔ modulator for low-voltage wideband applications,” Electronics Letters, vol. 43, no.17, pp. 910-911, 2007.##

   [5]      C. Han and N. Maghari,  “Delay based noise cancelling sturdy MASH delta-sigma modulator,” Electronics Letters, vol. 50, no. 5, pp. 351–353, 2014.##

   [6]       M. Honarparvar, J. M. de la Rosa, F. Nabki, and M. Sawan, “SMASH ΔΣ modulator with adderless feed-forward loop filter,” Electronics Letters, vol. 53, no. 8, pp. 532-534, 2017.##

   [7]      F. Hemmati, E. N. Aghdam, and F. Gozalpour, “DNC-SMASH structure improvement for high-resolution wideband applications,” IEEE 4th International Conference on Knowledge-Based Engineering and Innovation (KBEI), Tehran, pp. 0037-0039, 2017.##

   [8]      J. Silva, U. Moon, J. Steensgaard, and G. C.Temes, “Wideband low distortion delta-sigma ADC topology,” Electronics Letters, vol. 37, no. 12, pp. 737–738, 2001.##

   [9]      C. Han, A. Fahmy, and N. Maghari, “Noise-cancelling sturdy MASH delta-sigma modulator,” IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, pp. 1502-1505, 2016.##

[10]      X. Meng, Y. Zhang, T. He, and G. C. Temes, “Low-distortion wideband delta-sigma ADCs with shifted loop delays,” IEEE Transaction on Circuits & System I, vol. 62, pp. 376-384, 2015.##

[11]      M. Yavari, O. Shoaei, and A. Rodriguez-Vazquez, “Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensation,” in Proc. Design Automation and Test in Europe, pp. 144-149, 2006.##

[12]      R. Jiang and T. S. Fiez, “A 14-bit delta-sigma ADC with 8x OSR and 4MHz conversion bandwidth in a 0.18um CMOS process,” IEEE Journal of Solid-State Circuits, vol. 39, no. 1, pp. 63-74, 2004.##

[13]      M. Taghizadeh and S. Sadughi, “Improved unity-STF sturdy MASH ΣΔ modulator for low-power wideband applications,” Electronics Letters, vol. 51, no. 23, pp. 1941-1942, 2015.##

[14]      A. Morgado, R. Del Río, and J. M. de la Rosa, “Nanometer CMOS Sigma-Delta Modulators for Software Defined Radio,” Springer press, 2012.##

[15]      M. H. Maghami and M. Yavari, “A hybrid CT/DT          double-sampled SMASH ΣΔ modulator for broadband applications in 90 nm CMOS technology,” Analog Integrated Circuit and Signal Processing, vol. 73, pp. 101-114, 2012.##

[16]      N. Maghari, Sunwoo Kwon, and Un-Ku Moon, “74 dB SNDR Multi-Loop Sturdy-MASH Delta-Sigma Modulator Using 35 dB Open-Loop Opamp Gain,” IEEE Journal of Solid-State Circuits, vol. 44, no. 8, pp. 2212-2221, 2009.##

[17]       J. Ruı´z-Amaya, J. M. de la Rosa, F. V. Ferna´ndez, F. Medeiro, R. del Rı´o, B. Pe´rez-Verdu´, and A. Rodrı´guez-Va´zquez, “High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models,” IEEE Transaction on Circuits & System I, vol. 52, pp. 1795-1810, 2005.##

[18]      C. Han, T. Kim, and N. Maghari, “SMASH-MASH  delta-sigma modulator using noise-shaping quantizers,” 14th IEEE International New Circuits and Systems Conference (NEWCAS), Vancouver, pp. 1-4, 2016.##